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Last week I promised to talk more about what our team in PRC is doing. So in this post I have a little bit of a challenge for you XML pioneers out there.
If you could define new CPU instructions to improve XML validation, what would they be?
Well Yongnian Le from the XET team has ideas to share. Does “Parallel TRIE with Intel® SSE4.2/STTNI” sound more interesting than a morning coffee? For me yes, but please don’t tell my wife, she’s already has enough Ken’s so nerdy ammo.
A quick read that is a great introduction into yet another use of SIMD instructions. http://softwarecommunity.intel.com/isn/downloads/intelavx/Schema%20Validation%20w%20Intel%20SSE4_WP.pdf
Ken.
By Yongnian Le on May 5th, 2008 at 6:24 pm
To achieve high performance by utilizing SIMD instructions is quite promising for XML processing. Not only in schema validation, but also in XML parsing, Intel® SSE4.2/STTNI achieves great performance speedup compared with current algorithm. A quick read into below paper would give you more sense on how SIMD instructions are used to accelerate XML parsing by overall 25%.
http://softwarecommunity.intel.com/isn/downloads/intelavx/In.....SE4_WP.pdf
Besides above, our XML engineering team is consider to exploit more opportunities in XML processing, like how to utilize SIMD instructions in other XML processing and try to explore more parallel opportunities in XML parsing by SIMD instructions.